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2.1 Introduction
Many different processes exist for fabricating 3-D microstructures. Silicon was chosen as a structural material due to its outstanding mechanical and electrical properties. Batch fabrication was identified as a requirement to reduce manufacturing time and expense. Although existing surface micromachining processes meet these requirements, the thin structural layers associated with these processes are relatively fragile. Robust structures can be created by using multi-wafer stacks, but numerous alignment and bonding steps are necessary. A novel fabrication process is needed to produce high-aspect-ratio, robust structures with a minimum number of steps.
In this chapter, the 3DMEMS process is introduced. This process combines DRIE, aligned wafer bonding, and HF etching to produce true 3-D devices. Like surface micromachining processes, the 3DMEMS process employs several layers to allow the design of overhangs, out-of-plane joints, and enclosed cavities. However, the thickness of these layers is not limited, permitting mechanically stiff structures to be designed. Because SOI wafers are used, only one bonding step is required.
The first application of the 3DMEMS process was the design and attempted fabrication of a spatial micromanipulator. Fabrication results are reported, and improvements to the process are discussed.